1. Field of the Invention
The present invention relates, in general, to an interleaving apparatus and method for an orthogonal frequency division multiplexing transmitter and, more particularly, to an interleaving apparatus and method for an orthogonal frequency division multiplexing transmitter, which allows an orthogonal frequency division multiplexing transmitter based on IEEE802.11 standards to be efficiently implemented.
2. Description of the Prior Art
Recently, Internet phones have been activated, and wireless Internet phones, utilizing Wireless Local Area Network (WLAN) technologies based on Institute of Electrical and Electronic Engineers (IEEE) 802.11 standards, have been introduced. An Orthogonal Frequency Division Multiplexing (OFDM) scheme of WIAN technologies is a digital modulation scheme for improving a transmission rate per unit bandwidth and preventing multipath interference, and is a multi-carrier modulation scheme using a plurality of carriers orthogonal to each other.
An example of a typical OFDM transmitter is shown in FIG. 1. Referring to FIG. 1, in the typical OFDM transmitter, the transmission rate of data to be transmitted is set and the data are transmitted to a scrambler 101. Data scrambled by the scrambler 101 are input to an interleaver 103 through a convolution encoder 102. The interleaver 103 interleaves the data, and the interleaved data are mapped by a constellation mapper 104 according to a data transmission rate. The data mapped through the above process are transmitted to a Radio Frequency (RF) converter 108 through an Inverse Fast Fourier Transformer (IFFT) 105, a guard-interval inserter 106 and a symbol wave-shaping filter 107.
In data transmission technology based on OFDM, interleaving is a technology of causing burst errors to appear as random errors distributed to several small locations in consideration of the. fact that a greatly concentrated burst error may occur at a specific location during a process of transmitting data through a transmission medium. A means or device for implementing such an interleaving technology is called an interleaver.
An interleaver executes first and second permutation processes. The first permutation is based on an IEEE 802.11 standards-based permutation equation, i=(NCBPS/16) (k mod 16)+floor(k/16), where k=0, 1, . . . , NCBPS−1. The second permutation is based on an IEEE 802.11 standards-based permutation equation, j=s×floor(i/s)+(i+NCBPS−floor (16×i/NCBPS))mod s, where i=0, 1, . . . , NCBPS−1. In the two permutation equations, k represents each bit index of a bit stream before the first permutation, and i represents an index on which a bit, placed on a k-th position before the first permutation, is to be placed after the first permutation. Further, j represents an index on which a bit, placed on an i-th position before the second permutation, is to be placed after the second permutation, and mod represents a modulo operation. Further, floor( ) represents the highest integer that does not exceed the value in parentheses, NCBPS represents the number of encoded bits included in each OFDM symbol, s represents max(NBPSC/2,1), NBPSC represents the number of encoded bits included in each sub-channel forming an OFDM transmission band, and max( ) represents the highest value selected among the values in parentheses.
When the interleaver is implemented using hardware, it includes memory and an interleaver controller for writing and reading data in and from the memory. According to a mapping scheme related to a data transmission rate based on the standards, the position and sequence in which data are written in the memory and read from the memory are implemented as shown in FIG. 2, so that the first and second permutation processes can be described. FIG. 2 is view showing an example of a memory access scheme to describe an interleaving process. However, FIG. 2 shows only an embodiment to describe the first and second permutations.
As shown in the permutation equations, the size of memory used for permutation varies according to NCBPS and NBPSC. NCBPS and NBPSC vary according to mapping schemes, which are classified into four types: Binary Phase Shift Keying (BPSK), Quadrature Phase Shift Keying (QPSK), 16-Quadrature Amplitude Modulation (QAM) and 64-QAM. When the mapping scheme is BPSK, NCBPS is 48 and NBPSC is 1. When the mapping scheme is QPSK, NCBPS is 96 and NBPSC is 2. When the mapping scheme is 16-QAM, NCBPS is 192 and NBPSC is 4. When the mapping scheme is 64-QAM, NCBPS is 288 and NBPSC is 6. Therefore, it can be seen that, in the case of a BPSK mapping scheme, 48-bit memory is used, in the case of a QPSK mapping scheme, 96-bit memory is used, in the case of a 16-QAM mapping scheme, 192-bit memory is used, and, in the case of a 64-QAM mapping scheme, 288-bit memory is used.
Such a conventional interleaver is disadvantageous in that, when data are output from the memory, a subsequent functional block of the interleaver must unnecessarily perform data rearrangement for mapping, or data rearrangement according to sub-carrier frequency allocation. Further, the conventional interleaver is disadvantageous in that, since it does not separately execute first and second permutation processes, the design of a controller for outputting data bits from memory and rearranging the positions of the output data bits is complicated.
In the meantime, an embodiment of an interleaving apparatus disclosed in IEEE 802.11a PHY Specification shows an interleaver having a 1-bit input, 1-bit output structure. This interleaver, which is used to describe first and second permutations, includes single 1-bit writable/readable memory and a memory access address generator, and performs write and read operations corresponding to the first and second permutations on a 1-bit-at-a-time basis.